Sign in
third-party-mirror
/
GRTEv4
/
262be5abc585813b1766119db73641d44ba3741e
/
.
/
google3
/
third_party
/
grte
/
v4_src
/
glibc-2.19
/
sysdeps
/
unix
/
sysv
/
linux
/
sh
/
sh4
/
sysdep.h
blob: 852f8eed7f3f117a44986a933db1aebb6c206ca0 [
file
] [
log
] [
blame
]
/* 4 instruction cycles not accessing cache and TLB are needed after
trapa instruction to avoid an SH-4 silicon bug. */
#define
NEED_SYSCALL_INST_PAD
#include
<sysdeps/unix/sysv/linux/sh/sysdep.h>