doc/device-tree-bindings/misc/intel,baytrail-fsp.txt

Intel Bay Trail FSP UPD Binding
===============================

The device tree node which describes the overriding of the Intel Bay Trail FSP
UPD data for configuring the SoC.

All properties can be found within the `upd-region` struct in
arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
Intel's FSP Binary Configuration Tool for Bay Trail.  This list of properties
is matched up to Intel's E3800 FSPv4 release.

# Boolean properties:

- fsp,enable-sdio
- fsp,enable-sdcard
- fsp,enable-hsuart0
- fsp,enable-hsuart1
- fsp,enable-spi
- fsp,enable-sata
- fsp,enable-azalia
- fsp,enable-xhci
- fsp,enable-dma0
- fsp,enable-dma1
- fsp,enable-i2-c0
- fsp,enable-i2-c1
- fsp,enable-i2-c2
- fsp,enable-i2-c3
- fsp,enable-i2-c4
- fsp,enable-i2-c5
- fsp,enable-i2-c6
- fsp,enable-pwm0
- fsp,enable-pwm1
- fsp,enable-hsi
- fsp,mrc-debug-msg
- fsp,isp-enable
- fsp,igd-render-standby
- fsp,txe-uma-enable
- fsp,emmc45-ddr50-enabled
- fsp,emmc45-hs200-enabled
- fsp,enable-igd
- fsp,enable-memory-down

If you set "fsp,enable-memory-down" you are strongly encouraged to provide an
"fsp,memory-down-params{};" to specify how your memory is configured.  If you
do not set "fsp,enable-memory-down", then the DIMM SPD information will be
discovered by the FSP and used to setup main memory.


# Integer properties:

- fsp,mrc-init-tseg-size
- fsp,mrc-init-mmio-size
- fsp,mrc-init-spd-addr1
- fsp,mrc-init-spd-addr2
- fsp,emmc-boot-mode
- fsp,sata-mode
- fsp,lpe-mode
- fsp,lpss-sio-mode
- fsp,igd-dvmt50-pre-alloc
- fsp,aperture-size
- fsp,gtt-size
- fsp,scc-mode
- fsp,os-selection
- fsp,emmc45-retune-timer-value

- fsp,memory-down-params {

	# Boolean properties:

	- fsp,dimm-0-enable
	- fsp,dimm-1-enable

	# Integer properties:

	- fsp,dram-speed
	- fsp,dram-type
	- fsp,dimm-width
	- fsp,dimm-density
	- fsp,dimm-bus-width
	- fsp,dimm-sides
	- fsp,dimm-tcl
	- fsp,dimm-trpt-rcd
	- fsp,dimm-twr
	- fsp,dimm-twtr
	- fsp,dimm-trrd
	- fsp,dimm-trtp
	- fsp,dimm-tfaw
};

For all integer properties, available options are listed in fsp_configs.h in
arch/x86/include/asm/arch-baytrail/fsp directory (eg: MRC_INIT_TSEG_SIZE_1MB).


Example (from MinnowMax Dual Core):
-----------------------------------

/ {
	...

	fsp {
		compatible = "intel,baytrail-fsp";
		fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
		fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
		fsp,mrc-init-spd-addr1 = <0xa0>;
		fsp,mrc-init-spd-addr2 = <0xa2>;
		fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
		fsp,enable-sdio;
		fsp,enable-sdcard;
		fsp,enable-hsuart1;
		fsp,enable-spi;
		fsp,enable-sata;
		fsp,sata-mode = <SATA_MODE_AHCI>;
		fsp,lpe-mode = <LPE_MODE_PCI>;
		fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
		fsp,enable-dma0;
		fsp,enable-dma1;
		fsp,enable-i2c0;
		fsp,enable-i2c1;
		fsp,enable-i2c2;
		fsp,enable-i2c3;
		fsp,enable-i2c4;
		fsp,enable-i2c5;
		fsp,enable-i2c6;
		fsp,enable-pwm0;
		fsp,enable-pwm1;
		fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
		fsp,aperture-size = <APERTURE_SIZE_256MB>;
		fsp,gtt-size = <GTT_SIZE_2MB>;
		fsp,scc-mode = <SCC_MODE_PCI>;
		fsp,os-selection = <OS_SELECTION_LINUX>;
		fsp,emmc45-ddr50-enabled;
		fsp,emmc45-retune-timer-value = <8>;
		fsp,enable-igd;
		fsp,enable-memory-down;
		fsp,memory-down-params {
			compatible = "intel,baytrail-fsp-mdp";
			fsp,dram-speed = <DRAM_SPEED_1066MTS>;
			fsp,dram-type = <DRAM_TYPE_DDR3L>;
			fsp,dimm-0-enable;
			fsp,dimm-width = <DIMM_WIDTH_X16>;
			fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
			fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
			fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
			fsp,dimm-tcl = <0xb>;
			fsp,dimm-trpt-rcd = <0xb>;
			fsp,dimm-twr = <0xc>;
			fsp,dimm-twtr = <6>;
			fsp,dimm-trrd = <6>;
			fsp,dimm-trtp = <6>;
			fsp,dimm-tfaw = <0x14>;
		};
	};

	...
};